MIPS Cache: Memory hierarchy
Volatility
Technologies
Comparison of different types of memory 
Requirements
- Big
- Fast
- Value
Use a hierarchy of memory technologies:
Small but fast memory near CPU
Large but slow memory further away from CPU
Solution
Keep the MIPS most frequently used (MFU) and MIPS least recently used (LRU) data in smaller but faster memory.
Refer to bigger and slower memory when you cannot find data/instruction in the faster memory.
This works due to MIPS Cache: The Principle of Locality
Implementation
Processor checks if data is in cache.
Cache hit , (for X) data is returned to processor from cache. (ideal)
Cache miss, (for Y) data is loaded from memory. Takes more time. Data placed in cache for future reference (see MIPS cache conditions )
steps
Components
Summary
