MIPS multi-cycle
Break instructions into execution steps:
- MIPS Instruction fetch / IF Stage
- MIPS Instruction Decode / ID Stage + MIPS operand fetch / ID Stage
- MIPS Arithmetic-logical unit (ALU) / EX Stage
- MIPS memory access / MEM Stage
- MIPS result write / WB Stage
Example
Choose the longest stage time = 2ns
Executing 100 instructions with a given average cycle per instruction (CPI) of 4.6
100 * 4.6 * 2ns = 920ns (note this is longer than the MIPS single-cycle )